
flowHDL from Knowledge Based Silicon provides a very intuitive & easy-to-use graphical front end for the generation of HDL based designs.
SpeedSim/3 from SpeedSim is an extremely fast cycle-based simulator providing the design engineer with more time to perform verification of Verilog designs
VirtualICE is a hardware/software co-design environment allowing source level software debug against the new hardware design whilst still in the design phase.
flowHDL
SpeedSim/3
VirtualICE
Contacting VIZEF
Last Update: 18/02/97